This opportunity is now closed
Thank you for your interest in this opportunity; however, this opportunity is currently closed. Please note that all documentation pertaining to this project is no longer available for distribution.
Prototype FPGA Integrated Assurance Analysis, Logical & Physical Non-Destructive Verification Tool Development
This project will support the development, demonstration, and exploitation of technologies, algorithms, and methods to expand the ability and improve microelectronics testing and verification methodologies in support of verifying the trust and assurance of Field Programmable Gate Arrays (FPGAs) with Analysis Tools; and Built-In-Self-Tests (BIST).
PROJECT TIMELINE
Coming Soon Notice:
PST
RFS Release:
PST
RNI Release:
Questions Due:
PST
Q&A Responses:
PST
Solution due:
PST
Award Notice:
October 19, 2019 12:00 pm PST
Innovator NETWORX:
PST
Project TALX:
PST
1-on-1 Meetings:
PST