Call for Projects Now Closed
Thank you for your interest in the Microelectronics Commons Call for Projects. The Call for Projects is currently closed.
Microelectronics Commons Artificial Intelligence Hardware
Call for Projects Artificial Intelligence Hardware Awards
California-Pacific-Northwest AI Hardware Hub (NW AI)
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- Energy-Efficient and Scalable AI Hardware Systems through Heterogeneous Integration of Specialized Chiplets ($6.7M)
- This project will use innovations in semiconductor materials, integration technologies and AI system architecture to drastically improve energy consumption and performance of AI hardware. Interconnected heterogeneous chiplets, built using leading-edge CMOS and 3D CMOS+X semiconductor technologies such as carbon nanotube transistors, resistive memory, and oxide semiconductors, form the foundation for such AI systems.
- Energy-Efficient, Scalable, and Self-Learning AI Hardware with 3D Electronic-Photonic-Integrated-Circuits ($5.7M)
- This project pursues transformative improvements in AI Hardware’s speed, energy-efficiency, scalability, and self-learning capabilities for next-generation U.S. defense needs. The project approach combines “best-of-both-worlds” innovations in photonics and electronics including CMOS+X devices and integrates them into compact 3D photonic-electronic-integrated circuit modules.
- CMOS+X: Integrated Ferroelectric Technologies for Ultra Efficient AI Hardware ($4M)
- This project aims to substantially improve energy efficiency for future AI hardware by exploiting unique properties of ferroelectric materials. This project will focus on lowering the power supply voltage of computing hardware as well as achieving non-volatile memory that can be directly integrated with the microprocessor.
- Energy-Efficient and Scalable AI Hardware Systems through Heterogeneous Integration of Specialized Chiplets ($6.7M)
Midwest Microelectronics Consortium (MMEC)
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- Ultra Efficient In-Hardware Prototype Using Hyperdimensional Computing ($1.6M)
- Demonstrate an FPGA-driven, ferroelectric diode-based compute-in-memory prototype that slashes sample, time, and power burdens by orders of magnitude compared with state-of-practice CPU/GPU implementations.
- Breakthroughs will unlock the full potential of AI at the true edge - in size-, weight-, and power-constrained platforms from drones to vehicles to mobile devices.
- Ultra Efficient In-Hardware Prototype Using Hyperdimensional Computing ($1.6M)
Northeast Microelectronics Coalition (NEMC)
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- Lab‐to‐Fab Transfer of CMOS+memristor Chips for Edge Intelligence (7.9M)
- Project focused on the lab-to-fab development and transfer of hybrid chips and systems integrating memristor devices with CMOS leading to compact, fast, intelligent and secure electronic systems for edge-intelligence applications.
- Lab‐to‐Fab Transfer of CMOS+memristor Chips for Edge Intelligence (7.9M)
Silicon Crossroads Microelectronics Commons (SCMC)
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- CHEETA: CMOS+MRAM Hardware for Energy-EfficienT AI ($8.7M)
- This project seeks to develop a neuromorphic processor with in-memory computing (IMC) to overcome the von Neumann bottleneck and MRAM for higher density and energy efficiency that enables a new generation of robust energy efficient AI. The desired end-state will see a greater than 100X improvement in energy efficiency and sensor-to-decision latency over current commercial state-of-the-art solutions.
- CHEETA: CMOS+MRAM Hardware for Energy-EfficienT AI ($8.7M)
Southwest Advanced Prototyping (SWAP)
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- Spaceborne Low-Energy AI Computing (SLEAC) ($6M)
- The project aims to extend the power of artificial intelligence (AI) to satellites orbiting the planet by directly integrating a highly efficient, radiation hard AI chip with focal plane array image sensors used in space.
- Spaceborne Low-Energy AI Computing (SLEAC) ($6M)
Call for Projects Project Information Below is No Longer Current due to Submission Deadline Closing
The Microelectronics Commons Call for Projects has been amended.
A summary of amendments are as follows:
D1 – Added Submission Directions
D2 – Added EDA Tools and IP and Core Access Report // Letters of Support// References//Added Does not count towards 20-page limit
D3(c)- Added EDA Tools / Letters of Support/Heilmeier Responses/References
D4 – Added 15) Identify technology area, topic number(s), and project proposal number XX of 15 (e.g Project Proposal 1 of 15)
D5- Title change to “ Contents of Price Response”
D5 – Removed “severable” from instructions table (Payable Milestone Schedule)
You can find the complete amended Call for Projects under Key Documents.
Project Background
Microelectronics Commons is a CHIPS and Science Act-funded national network for onshore, microelectronics hardware-focused prototyping, laboratory to fabrication (lab-to fab) transition of semiconductor technologies and semiconductor workforce training. In 2023, the Department of Defense (DoD) established the Microelectronics Commons – a network of eight regional Hubs to evolve laboratory prototypes to fabrication prototypes and to strengthen the semiconductor workforce. Annually, Hubs will compete for project awards. These annual project awards may include infrastructure (physical, digital, and human) required to accomplish the proposed prototypes. This Call for Projects (CFP) describes the desired capabilities for which project proposals are being sought.
Microelectronics Commons Hub facilities include laboratory prototype capabilities, which typically includes ≤100 mm and ≤200 mm tooling for compound semiconductor and silicon based technologies, respectively. Hubs can also generate and mature prototypes for Cores to scale up for subsequent potential selection by the National Semiconductor Technology Center (NSTC) and/or industrial microelectronics companies, such as fabless or Integrated Device Manufacturers (IDMs), for commercialization. The role of the regional Hubs is to connect researchers and designers to prototyping capabilities targeted to strengths in the Hub’s technical topic areas.
Microelectronics Commons Cores are fabs/foundries, manufacturing facilities where semiconductor devices are manufactured, that have scalable capacity for prototyping beyond what the regional Hubs can provide (fab prototyping). They are available for use by innovators that run the gamut from university and small business up to large industrial concerns. Cores typically have 300 mm capabilities for silicon-based technologies (other sizes are technology appropriate) and are facilities that can demonstrate prototypes with the volume and characteristics required to ensure reduced risk for manufacturing. Cores serve a dual function: First, they serve to further complement and advance the work of the regional Hubs; i.e., they are integral to the Hubs themselves. For example, they provide capabilities at ≥200 mm wafer fab for silicon complimentary metal-oxide-semiconductor- (CMOS-) compatible technologies and ≥100 mm wafer fab for compound semiconductors. Second, they serve to engage with commercial fabs and better align regional Hubs to commercial processes to facilitate transition of technologies.
Current State and Desired End-State
Innovative prototypes to include microelectronics materials, processes, devices, and architectural designs will be supported. Activities executed within Microelectronics Commons shall primarily fall under Budget Activity (BA) 3, although activities that fall under Budget Activities 2 and 4 will also be supported if they are in support of the lab-to-fab prototype. (e.g., BA 2 activities may be needed to support iterative development, and BA 4 activities may be needed to support the transition of a project to DoD demonstrators.)
For further discussion on research, development, testing, and evaluation (RDT&E) budget activities, see the DoD Financial Management Regulation, DoD 7000.14-R, Volume 2B, Chapter 5. (VOLUME_2B (defense.gov).
For further discussion on Manufacturing Readiness Levels (MRLs), see the Manufacturing Readiness Level (MRL) Deskbook, Version 2.0. https://www.dodmrl.com/MRL_Deskbook_V2.pdf
Microelectronics Commons will support prototype projects across six technical areas that are critical to the DoD. Those areas are: Secure Edge/Internet of Things Computing, 5G/6G Technology, Artificial Intelligence Hardware, Quantum Technology, Electromagnetic Warfare, and Commercial Leap Ahead. Specifically, prototype projects that achieve the desired capabilities as described in the Desired Capabilities document (Attachments c-h) are being sought. The current state, desired end-state, and success criteria for those prototype projects are included in the Desired Capabilities document.
The end-state goal is microelectronics hardware-focused prototyping and lab-to-fab transition of semiconductor technologies. For lab-to-fab prototyping, the fab prototype must at least match if not exceed lab prototype technical specifications, and there must be a path to manufacturability in a Core (i.e., a foundry or fab). Projects that have been demonstrated in a lab and are ready for prototyping in a fab will have higher priority than lab prototyping projects.
View the full Call for Projects (CFP) under Key Documents on the right side of the page.
Artificial Intelligence Hardware Projects
Artificial Intelligence Hardware Topic 1: Heterogeneous Integration of AI-specialized Chiplets
Artificial Intelligence Hardware Topic 2: Advances in Novel Materials and Fabrication Processes for CMOS-level Integration (CMOS+X)
Artificial Intelligence Hardware Topic 3: Sensor and AI Fusion
Artificial Intelligence Hardware Topic 4: In-hardware Learning
Artificial Intelligence Hardware Topic 5: Specialized Hardware for Combinatorial Optimization
Artificial Intelligence Hardware Topic 6: AI Hardware for Extreme Environments
Artificial Intelligence Hardware Topic 7: Photonic AI Compute
To view the full Artificial Intelligence Hardware projects, please refer to the technical guide found under Key Documents on the right side of the page.
Connect With a Hub
The Microelectronics Commons program is comprised of eight regional Hubs, each managing their own network of commercial innovators. Those who are interested in contributing their capabilities in support of the Microelectronics Commons program must join a Hub. Click the button below to learn more about each Hub and how to get in touch.